1. Field of the Invention
This invention relates to a semiconductor device, its manufacturing method and a substrate for manufacturing a semiconductor device, and more particularly to a semiconductor device, like a semiconductor laser, having cavity edges made by cleavage, its manufacturing method, and a substrate, like a wafer, used for manufacturing such a semiconductor device.
2. Description of the Related Art
Nitride III-V compound semiconductors, such as GaN, AlGaN and GaInN, made of a group III element, such as gallium (Ga), aluminum (Al) and indium (In), and nitrogen as a group V element, are direct-transitional semiconductors, and they have larger band gaps than those of semiconductors such as AlGaInAs and AlGaInP used in currently available semiconductor lasers. Therefore, they are expected to be widely applicable as light sources of high-integrated, high-density optical disc reproducing apparatuses and optical elements for full-color display devices, in form of short-wavelength semiconductor lasers for emission wavelengths in the band of 400 nm, light emitting diodes (LED) and other semiconductor light emitting devices capable of emitting ultraviolet to green light. Moreover, these nitride III-V compound semiconductors exhibit large saturation electron velocities under a high electric field, and are remarked as materials of electron-mobility devices such as field-effect transistors (FET) for high powers and high frequencies.
Semiconductor lasers, light emitting diodes and FETs using these nitride III-V compound semiconductors are made by epitaxially growing nitride III-V compound semiconductors on a substrate such as sapphire (Al2O3) substrate, for example.
In semiconductor lasers, in general, cavity edges must be made. In AlGaInAs, AlGaInP or InP semiconductor lasers, substrates and semiconductor layers grown thereon are cleavable, and cleavable surfaces are normally used as cavity edges of the semiconductor lasers.
In case of nitride III-V compound semiconductors, however, it is usually difficult to make stable cleavable surfaces because their crystallographic structures are hexagonal system wurtzite structures. Moreover, since these semiconductor lasers using nitride III-V compound semiconductors are usually made by growing nitride III-V compound semiconductors on sapphire substrates which are not cleavable, it has been difficult to fabricate semiconductor lasers using cleavable surfaces as cavity edges.
Japanese Patent Laid-Open Publications Nos. hei 8-222807 and hei 9-172223, for example, disclose methods for manufacturing GaN semiconductor lasers in which cavity edges are made by cleaving a sapphire substrate and III-V compound semiconductor layers stacked thereon.
More specifically, as shown in FIG. 1, these conventional methods for manufacturing GaN semiconductor lasers sequentially grow a GaN buffer layer 102, n-type GaN contact layer 103, n-type AlGaN cladding layer 104, active layer 105 of a GaN/GaInN multiquantum well structure, p-type AlGaN cladding layer 106 and p-type GaN contact layer 107 on a c-plane sapphire substrate 101 by metal organic chemical vapor deposition (MOCVD).
Next made on the p-type GaN contact layer 107 is a resist pattern (not shown) in form of a predetermined stripe. Using the resist pattern as a mask, reactive ion etching (RIE) is conducted to selectively remove upper layers including an upper part of the n-type GaN contact layer 103. As a result, the upper-lying part of the n-type GaN contact layer 103, n-type AlGaN cladding layer 104, active layer 105, p-type AlGaN cladding layer 106 and p-type GaN contact layer 107 are patterned into a predetermined mesa structure extending in a direction. Numeral 108 denotes the mesa portion.
After the resist pattern is removed, the p-side electrode (not shown) is made on the p-type GaN contact layer 107, and the n-side electrode (not shown) is made on the n-type GaN contact layer 103 in the partly removed region.
After that, the wafer-shaped sapphire substrate 101 having formed the laser structure is lapped from its bottom surface to adjust the thickness of the sapphire substrate 101 to approximately 150 xcexcm. Then, in locations of the bottom surface of the sapphire substrate 101 for making cavity edges, which may be locations corresponding to (11-10)-oriented surfaces, straight cleavage-assist grooves 109 are made to extend in parallel to the (11-20)-oriented surfaces. Thus, in the direction parallel to the lengthwise direction of the mesa portion 108, that is, in the cavity direction, a plurality of cleavage-assist grooves 109 are made periodically in intervals approximately the same as the cavity length of the GaN semiconductor lasers to be finally made.
The sapphire substrate 101 is next cleaved into bars together with the semiconductor layers thereon along the cleavage-assist grooves 109 to make opposite cavity edges, and the bars are divided into chips. As a result, the intended GaN semiconductor laser is completed.
The conventional method for manufacturing a GaN semiconductor laser can make cavity edges of cleavable surfaces (quasi-cleavable surfaces) more excellent in optical characteristics than those of cavity edges made by etching semiconductor layers forming the laser structure.
However, the conventional method for manufacturing a GaN semiconductor laser involves the following problems.
In most semiconductor lasers, the optical cavity length is designed to 1 mm or less, more particularly, in the range of 0.2 to 0.7 mm, approximately. However, in order to minimize the optical cavity length to these values, the thickness of the sapphire substrate 101 must be reduced by lapping. For example, unless the thickness of the sapphire substrate 101 is 150 xcexcm or less, the sapphire substrate 101 and overlying semiconductor layers do not readily divide along the cleavage-assist groove 109, and it was difficult to make cavity edges acceptable in optical evenness at the desired position.
Moreover, since the sapphire substrate 101 is chemically stable, it is difficult to selectively etch semiconductor layers made of nitride III-V compound semiconductors layers, or insulating films such as SiO2 film and SiN film, which are made on the sapphire substrate. It is therefore difficult to chemically process the sapphire substrate 101 alone while protecting a part of the crystal growth surface and bottom surface. Therefore, in order to make cleavage-assist grooves 109 in the sapphire substrate 101, dicing, scribing or other mechanical processing was necessary, and there arose problems in pattern accuracy and micro processing of the cleavage-assist grooves 109.
Since the sapphire substrate 101 decreases in strength with a reduction in thickness, if the sapphire substrate 101 is made thinner, then the sapphire substrate 101 is apt to crack to its surface or break while the cleavage-assist grooves 109 are made on the bottom surface of the sapphire substrate 101 by using a dicer or scriber, for example. In this case also, it was impossible to make acceptable cavity edges. For the purpose of preventing cracks of breakage of the sapphire substrate 101, there arose the need for minimizing varieties in thickness of the sapphire substrate 101 by controlling the thickness of sapphire substrate 101 after lapping, and the thickness of the sapphire substrate 101 in locations of the cleavage-assist grooves 109 after being made. Furthermore, as the sapphire substrate 101 was made thinner and thinner, warp of the substrate became too large to handle the substrate due to thermal stress caused by a difference in thermal expansion coefficient between the sapphire substrate 101 and semiconductor layers grown thereon, and/or damages by lapping. or the like.
It is therefore an object of the invention to provide a semiconductor device, its manufacturing method and a substrate used for manufacturing a semiconductor device, ensuring excellent cleavable surfaces to be made on semiconductor layers precisely and stably when edges of cleavable surfaces are made on semiconductor layers stacked on a substrate, even when the substrate is non-cleavable, difficult to cleave or different in cleanable orientation from the semiconductor layers, or the size of the semiconductor device is as small as 1 mm or less.
According to the first aspect of the invention, there is provided a semiconductor device having a cleavable semiconductor layer stacked on a substrate and having an edge made up of a cleavable surface, comprising:
the edge of the semiconductor layer being made by first stacking the semiconductor layer on the substrate, then making a cleavage-assist groove at least partly in the semiconductor layer along a portion for making the edge except a portion for a major part of the edge, and cleaving the semiconductor layer and the substrate from the cleavage-assist groove.
According to the second aspect of the invention, there is provided a semiconductor device including a cleavable semiconductor layer stacked on a substrate and having a pn junction and an edge made up of a cleavable surface, comprising:
the edge of the semiconductor layer being made by first stacking the semiconductor layer on the substrate, then making a cleavage-assisting groove at least in a portion of the semiconductor layer in a location for making the edge by a depth beyond the pn junction, and cleaving the semiconductor layer and the substrate from the cleavage-assist groove.
According to the third aspect of the invention, there is provided a device-manufacturing substrate for use in manufacturing a semiconductor device by stacking a cleavable semiconductor layer on the substrate and cleaving the substrate and the semiconductor layer to obtain a semiconductor device having an edge made up of a cleavable surface of the semiconductor layer, comprising:
a cleavage-assist groove made at least in a part of a location of the semiconductor layer for making the edge except a portion for a major part of the edge.
According to the fourth aspect of the invention, there is provided a device-manufacturing substrate for use in manufacturing a semiconductor device by stacking a cleavable semiconductor layer including a pn junction on the substrate and cleaving the substrate and the semiconductor layer to obtain a semiconductor device having an edge made up of a cleavable surface of the semiconductor layer, comprising:
a cleavage-assist groove made at least in a part of a-location of the semiconductor layer for making the edge by a depth beyond the pn junction.
According to the fifth aspect of the invention, there is provided a method for manufacturing a semiconductor device including a cleavable semiconductor layer stacked on a substrate and having an edge made up of a cleavable surface, comprising:
a step of stacking the semiconductor layer on the substrate;
a step of making a cleavage-assist groove at least in a location of the semiconductor layer for making the edge except a portion for a manor part of the edge; and
a step of cleaving the semiconductor layer and the substrate from the cleavage-assist groove to make the edge on the semiconductor layer.
According to the sixth aspect of the invention, there is provided a method for manufacturing a semiconductor device having a cleavable semiconductor layer stacked on a substrate and having an edge made up of a cleavable surface, comprising:
a step of stacking the semiconductor layer on the substrate;
a step of making cleavage-assist groove at least in a location of the semiconductor layer for making the edge by a depth beyond the pn junction; and
a step of cleaving the semiconductor layer and the-substrate from the cleavage-assist groove to make the edge on the Semiconductor layer.
In the present invention, the cross-sectional shape of the cleavage-assist groove may be rectangular. However, for facilitating regulation of the cleaving position and the process of cleaving the semiconductor layers and the substrate, the cleavage-assist groove is preferably configured to concentrate stress to its bottom upon cleavage, such as a V-shaped, U-shaped groove or any shape with one side surface parallel to the lengthwise direction being a vertical surface, in its cross section.
In the present invention, the portion as the main portion of the edge changes depending upon the sort of the semiconductor device. For example, in a semiconductor device where light enters and exits through edges of the semiconductor layers, namely, in a semiconductor light emitting device such as semiconductor laser or light emitting diode, or in an optical semiconductor device such as photo detector or other semiconductor optical detector device, the main portion of the edge is a portion behaving as the light outlet region or the light inlet region, and more preferably, it is a portion including its proximity. In an electron mobility device such as field effect transistor, or in a semiconductor integrated circuit incorporating a plurality of electron mobility devices, the main portion of the edge is a structurally central part of each chipped device, for example.
In the present invention, when the semiconductor device is an optical semiconductor device having a light outlet region or a light inlet region on its edge, the cleavage-assist groove is made in a location of the edge outside the location for the light outlet region or the light inlet region so that the characteristics of the optical semiconductor device are not damaged. In this case, in the first, third and fifth aspects of the invention, the cleavage-assist groove may be made directly above the location of the edge for the light outlet region or the light inlet region but not reaching the location for the light outlet region or the light inlet region.
In the present invention, usable materials of the semiconductor layers involve nitride III-V compound semiconductors containing, for example, at least one group III element selected from the group consisting of Ga, Al, In and B, and one or more group V elements including at least N and including As or P, where appropriate. Examples of nitride III-V compound semiconductors are GaN, AlGaN, GaInN, and AlGaInN. The substrate used in the invention may be any which is non-cleavable, difficult to cleave or different in cleavable orientation from the semiconductors stacked thereon. Examples of such substrates involve a sapphire substrate used in semiconductor devices such as semiconductor lasers using the above-mentioned nitride III-V compound semiconductors.
In the third, fourth, fifth and sixth aspects of the invention, the cleavage-assist groove preferably extends in parallel to the cleavable surface of the semiconductor layers, and cleavage-assist grooves are preferably made periodically in approximately equal intervals in the direction normal to the cleavable surfaces of the semiconductor layers.
According to the first, third and fifth aspects of the invention configured as mentioned above, since the cleavage-assist groove is made at least in a part of the location other than the location used as the main portion of the edge in the semiconductor layers in the location where the edge should be made, the position for cleavage in the semiconductor layers is easily determined, and the semiconductor layers and the substrate can be cleaved from the cleavage-assist groove. Therefore, the substrate and the semiconductor layers can be cleaved easily and reliably along the cleavage-assist groove. As a result, even when the substrate is non-cleavable, difficult to cleave or different in cleavable orientation from the semiconductor layers thereon, or the semiconductor device is desired as small as 1 mm or less, edges of cleavable surfaces can be made stably in the semiconductor layers while regulating the cleaving position in the semiconductor layers. Additionally, since the cleavage-assist grooves is made in a location other than the portion as the main portions of the edge, the cleavable surface can be made in the semiconductor layers without damaging the characteristics of the semiconductor device to be made.
According to the second, fourth and sixth aspects of the invention configured as explained above, since the cleavage-assist groove is made at least in a part of the semiconductor layers in a location for making the edge to a depth beyond the pn junction, the cleaving position in the semiconductor layers is easily determined, and the semiconductor layers and the substrate can be cleaved from the cleavage-assist groove. Therefore, the substrate and the semiconductor layers can be cleaved easily and reliably along the cleavage-assist groove. As a result, even when the substrate is non-cleavable, difficult to cleave or different in cleavable orientation from the semiconductor layers thereon, or the semiconductor device is desired as small as 1 mm or less, edges of cleavable surfaces can be made stably in the semiconductor layers while regulating the cleaving position in the semiconductor layers. Additionally, since the cleavage-assist groove is deeper in the semiconductor layers than that with a depth not reaching the pn junction, the substrate and the semiconductor layers ran be cleaved more easily.
Furthermore, the present invention is configured to make the cleavage-assist groove in the semiconductor layers, the cleavage-assist groove can be made by dry etching in a wafer process. Therefore, the cleavage-assist groove can be made with a good pattern accuracy, and micro processing can be conducted to make the cleavage-assist groove in form of a broken line. Moreover, since the invention needs no mechanical processing such as dicing or scribing required in the conventional technique, cracking or breakage of the substrate does not occur upon making the cleavage-assist groove even when the substrate is thin and weak.